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Restructuring for all the wrong reasons

The York University community is hearing all kinds of messaging about restructuring these days and it's important to provide some context as to what is behind it and examples of other restructurings, like those that were forced on the City of Toronto by Mike Harris and Doug Ford that did not deliver on the promises […]

CourseHero Watermarks, Why Doesn't YorkU?

Piracy of professor-authored teaching material is rampant. I've written about it before. Students and teaching staff have uploaded my material to Course Hero and I'm not happy about it. In spite of requesting that they don't do it, they still do it. I write explicit footnotes in my documents saying not to do it, and […]

Trackballs: An Engineer's Best Pointing Tool

A few years ago, when I took on my new role at York University, I was doing a research project with Knix and my research assistant, Ken, told me all about his favourite computer pointing device. It wasn't a gaming mouse. It wasn't a trackpad. It was a trackball. Why do I think that Ken […]

VPL & RISC-V Simulation with Kite (with random registers)

In another post, I set up a basic Virtual Programming Lab exercise for RISC-V simulations with Assembler coding and the Kite simulator. That example is vulnerable to students hard-coding the register values without actually writing the necessary code. But I wrote it in order to provide a solid first example. Here, we're going to write […]

Confusion on Workplace Incident Reporting at York University

I want to follow-up on my earlier post on workplace incident reporting at York University. Our HSEWB department, which controls resources and processes related to workplace health and safety at York University, continues to insist that documentation -- including workplace incident forms -- be hidden behind password protection access. Hiding health and safety documentation behind […]

RISC-V on EECS Dept Computers: Compiling and Simulating

In this blog post I'm going to go through the steps for setting up a program for simulating basic RISC-V processors on computers in York University's EECS department. This should be helpful for undergraduate and graduate students, as well as faculty who want to use RISC-V in their research or courses. While we've been using […]

Spike Simulator for learning: C vs. Assembler

RISC-V processors, like ARM processors, are complex beasts, making them challenging to teach with. When teaching with them it's important to have appropriate development tools to reflect the immediate pedagogical goals but also to provide students with a pathway for further learning and application. When I teach courses on computer architecture, like EECS 2021 at […]

Computer Suggestions for Students 2024/25

Incoming engineering and computer science students often ask "which computer should I get?" when preparing for university life. I tackled this a few years ago on Twitter and in my previous blog posts, each year from 2020 onward. The basics remain the same:  Laptops are useful tools Macs are fine for most students Windows may be required […]

Getting Started with RISC-V: Spike Simulator

The Spike simulator is a command-line application for RISC-V development. It allows for both 32-bit and 64-bit simulations and supports multiple variants of RISC-V types. It's an alternative to using the Segger emSim simulator, which has both a graphical mode and a command line mode and. It's also more up-to-date and widely-used than the RVS […]

CLion & LibSerialPort

I've been itching to kick the tires on the CLion IDE to see how it works as a contemporary C and C++ development environment. I've been using Jetbrain's IntelliJ IDE ever since my student,Richard Robinson, recommended it to me for Java development. I typically write C programs using embedded IDEs like MCUXpresso, Segger Embedded Studio […]